The A7' and A7 lines alternate connections every column. You can see the binary counting in the emitters. (The N and P silicon regions of the transistors are visible as rectangular boxes, with the brownish metal layer onĮach NAND gate has a different combination of address bits A3-A7 either inverted or uninverted, so each address activates a different NAND gate, selecting the associated column. Implemented with multiple-emitter transistors. Thus, addressing has two parts-one to select the column and one to select the four output bits-and they have separate circuitry, The four selected bits become the four outputs. The selected 32 bits in the column go through the multiplexers at the right, which select one bit out of each group of eight,īased on address bits A0-A2. To access the memory, address bits A3-A7 select one of the 32 columns. However, the bits are physically arranged in a 33×33 grid sinceĪ square memory grid is more efficient than a highly-rectangular one. The PROM stored 1024 bits as 256 words of 4 bits. (This is the wavelength of red light, so the crack is just barely visible under the microscope.) Address decoding I expected a blown fuse would vaporize entirely, but instead a blown fuse contains a tiny crack roughly 700 nm wide. The fuses are very small, about 8µm long. The fuses are visible in the die photo above they are the purple regions between the metal wiring.

Inset circle shows a magnified fuse, showing the tiny horizontal crack indicating the fuse was blown. It is commonly used in applications such as toasters.)Ī closeup of the fuses (purple) that store data. (Nichrome is a nickel-chromium alloy that has much higher resistance than typical metals, causing it to heat up. The fuses were fabricated from tiny regions of Nichrome metal that heat up and melt under high voltage. Thus, the chip was shipped containing all 1's, and the user programmed the chip by blowing fuses where a 0 bit was An intact fuse represented a 1, while a blown fuse represented a 0. The output drivers amplified these signals and sent them to the output pins. To the right, DTL multiplexers 4 reduced the 32 rows of output to the 4 desired outputs.

Note that the data array only takes up about a quarter of the chip the rest of the chip holds the supporting circuitry.īelow the data array, address decode circuitry used the address lines to select one of 32 columns in the array. The 1024 bits of data are stored in a 33×33 array of diodes and fuses. Die of the 5300 PROM with components labeled.

Sp column 4.81 crack